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Fundamentals of Computer Organization and Architecture<br />
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Type.................: Ebook<br />
Part Size............: 3,541,142 bytes<br />
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Posted by............: ~tqw~<br />
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This is the first book in the two-volume set offering comprehensive coverage of <br />
the field of computer organization and architecture. This book provides complete <br />
coverage of the subjects pertaining to introductory courses in computer <br />
organization and architecture, including:<br />
* Instruction set architecture and design<br />
* Assembly language programming<br />
* Computer arithmetic<br />
* Processing unit design<br />
* Memory system design<br />
* Input-output design and organization<br />
* Pipelining design techniques<br />
* Reduced Instruction Set Computers (RISCs)<br />
The authors, who share over 15 years of undergraduate and graduate level <br />
instruction in computer architecture, provide real world applications, examples <br />
of machines, case studies and practical experiences in each chapter.<br />
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Table of Contents<br />
<br />
Preface.<br />
1. Introduction to Computer Systems.<br />
1.1. Historical Background.<br />
1.2. Architectural Development & Styles.<br />
1.3. Technological Development.<br />
1.4. Performance Measures.<br />
1.5. Summary.<br />
Exercises.<br />
References and Further Reading.<br />
2. Instruction Set Architecture & Design.<br />
2.1. Memory Locations and Operations.2.2. Addressing Modes.<br />
2.3. Instruction Types.<br />
2.4. Programming Examples.<br />
2.5. Summary.<br />
Exercises.<br />
References and Further Reading.<br />
3. Assembly Language Programming.<br />
3.1. A Simple Machine.<br />
3.2. Instructions Mnemonics and Syntax.<br />
3.3. Assembler Directives and Commands.<br />
3.4. Assembly and Execution of Programs.<br />
3.5. Example: The X 86 Family.<br />
3.6. Summary.<br />
Exercises.<br />
References and Further Reading.<br />
4. Computer Arithmetic.<br />
4.1. Number Systems.<br />
4.2. Integer Arithmetic.<br />
4.3. Floating Point Arithmetic.<br />
4.4. Summary.<br />
Exercises.<br />
References and Further Readings.<br />
5. Processing Unit Design.<br />
5.1. CPU Basics.<br />
5.2. Register Set.<br />
5.3. Data Path.<br />
5.4. The CPU Instruction Cycle.<br />
5.5. Control Unit.<br />
5.6. Summary.<br />
Exercises.<br />
References.<br />
6. Memory System Design I.<br />
6.1. Basic Concepts.<br />
6.2. Cache Memory.<br />
6.3. Summary.<br />
Exercises.<br />
References and Further Readings.<br />
7. Memory System Design II.<br />
7.1. Main Memory.<br />
7.2. Virtual Memory.<br />
7.3. Read-Only Memory.<br />
7.4. Summary.<br />
Exercises.<br />
References and Further Readings.<br />
8. Input-Output Design and Organization.<br />
8.1. BasicConcepts.<br />
8.2. Programmed I/O.<br />
8.3. Interrupt-Driven I/O.<br />
8.4. Direct Memory Access (DMA).<br />
8.5. Busses.<br />
8.6. Input-Output Interfaces.<br />
8.7. Summary.<br />
Exercises.<br />
References and Further Readings.<br />
9. Pipelining Design Techniques.<br />
9.1. General Concepts.<br />
9.2. Instruction Pipeline.<br />
9.3. Arithmetic pipeline.<br />
9.4. Summary.<br />
Exercises.<br />
References and Further Reading.<br />
10. Reduced Instruction Set Computers (RISCs).<br />
10.1. RISC/CISC Evolution Cycle.<br />
10.2. RISCs Design Principles.<br />
10.3. Overlapped Register Windows.<br />
10.4. RISCs Versus CISCs.<br />
10.5. Pioneer (University) RISC Machines.<br />
10.6. Example of Advanced RISC Machines.<br />
10.7. Summary.<br />
Exercises.<br />
References and Further Readings.<br />
11. Introduction to Multiprocessors.<br />
11.1. Introduction.<br />
11.2. Classification of Computer Architectures.<br />
11.3. SIMD Schemes.<br />
11.4. MIMD Schemes.<br />
11.5. Interconnection Networks.<br />
11.6. Analysis and Performance Metrics.<br />
11. 7. Summary.<br />
Exercises.<br />
References and Further Readings.<br />
Index. <br />
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Product Details<br />
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* ISBN: 0471467413<br />
* ISBN-13: 9780471467410<br />
* Format: Textbook Hardcover, 288pp<br />
* Publisher: Wiley, John & Sons, Incorporated<br />
* Pub. Date: January 2005<br />
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