High-Performance Packet Switching Architectures~tqw~ darksiderg

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  High-Performance Packet Switching Architectures~tqw~ darksiderg
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• Size:
  3.5 MB
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• Added:
  06/06/2008
• Last check:
  2009-09-23 02:10:46
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  *******************************************************************************<br /> High-Performance Packet Switching Architectures<br /> *******************************************************************************<br /> <br /> -------------------------------------------------------------------------------<br /> General Information<br /> -------------------------------------------------------------------------------<br /> Type.................: Ebook<br /> Part Size............: 3,635,731 bytes<br /> <br /> <br /> <br /> <br /> -------------------------------------------------------------------------------<br /> Post Information<br /> -------------------------------------------------------------------------------<br /> Posted by............: ~tqw~<br /> <br /> -------------------------------------------------------------------------------<br /> Release Notes<br /> -------------------------------------------------------------------------------<br /> Internet traffic is increasing at a rate of at least 200% per year. The world&rsquo;s <br /> largest Internet Service Provider has recently stated that it expects traffic <br /> capacity on its regional trunks to grow to a 1-10 petabit range over the next <br /> four to five years. Wavelength division multiplexing (WDM), long-haul <br /> fiber-optic links and high-capacity all-optical circuit switches are now being <br /> employed at the Internet core to process such massive traffic, consequently <br /> creating a demand for novel high-performance packet switching technologies (IP <br /> routers, ATM switches, and Ethernet Switches) which feed the optical core.<br /> <br /> Over the last ten years, tremendous technological advances have taken place in <br /> order to achieve these objectives. High-performance Packet Switching <br /> Architectures is the first book to cover these advances in a comprehensive <br /> one-volume survey. The book&rsquo;s editors have brought together contributions from <br /> leading researchers in industry and universities, yielding an integrated <br /> coverage of the state-of-the-art in packet-switching technologies.<br /> <br /> A mix of theoretical and practical material allows the book to act an essential <br /> reference for researchers in academia as well as industrial engineers.<br /> <br /> Table Of Contents<br /> <br /> List of Contributors xi<br /> 1 Architectures of Internet Switches and Routers 1<br /> 2 Theoretical Performance of Input-queued Switches Using Lyapunov Methodology 39<br /> 3 Adaptive Batched Scheduling for Packet Switching with Delays 65<br /> 4 Geometry of Packet Switching: Maximal Throughput Cone Scheduling Algorithms 81<br /> 5 Fabric on a Chip: A Memory-management Perspective 101<br /> 6 Packet Switch with Internally Buffered Crossbars 121<br /> 7 Dual Scheduling Algorithm in a Generalized Switch: Asymptotic Optimality and <br /> Throughput Optimality 147<br /> 8 The Combined Input and Crosspoint Queued Switch 169<br /> 9 Time&ndash;Space Label Switching Protocol (TSL-SP) 197<br /> 10 Hybrid Open Hash Tables for Network Processors 211<br /> Index 229<br /> <br /> Product Details<br /> <br /> * ISBN: 184628273X<br /> * ISBN-13: 9781846282737<br /> * Format: Hardcover, 230pp<br /> * Publisher: Springer-Verlag New York, LLC<br /> * Pub. Date: August 2006<br /> <br /> -------------------------------------------------------------------------------<br /> Install Notes<br /> -------------------------------------------------------------------------------<br /> PDF Reader
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High-Performance Packet Switching Architectures~tqw~_darksiderg.pdf	3.5 MB
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